Ultra-Low Power Time-Delay-to-Digital Converter Accepted and Presented at IEEE CICC ’18

The paper titled: A 78.2nW 3-Channel Time-Delay-to-Digital Converter using Polarity Coincidence for Audio-based Object Localization was accepted and presented by ICSL and CISL PhD student Daniel De Godoy Peixoto at IEEE Custom Integrated Circuits Conference 2018 in San Diego, CA, USA between April 8 – 11, 2018.

The paper introduces a new ultra-low power ASIC solution that interfaces with microphones to perform objection localization using audio. This new technology will be integrated into the pedestrian safety project to alert pedestrians of oncoming vehicles and other hazards that may go unnoticed while on the streets.

Congratulations to Daniel and the team!